Questions tagged [gnu-make]
GNU Make is the GNU project's implementation of the `make` utility. On BSD systems, the GNU Make executable is sometimes called `gmake` to differentiate it from BSD Make.
122 questions
0 votes
2 answers
59 views
Is make's $(<D) affected by nearby spaces?
Is there any hope of using $(<D) here? Any hope of avoiding the mystery dots? $ cat Makefile D=$(HOME)/Downloads test: $D/DreamHost\ Web\ Panel\ _\ Mail\ _\ Message\ Filters.html : mv "$&...
- 667
8 votes
1 answer
654 views
Why does make's `dir` function add additional directories?
When I apply dir to a list of files, it adds additional directories. For example, with the following file/directory structure: . ├── a │ └── foo.c ├── b │ └── foo.c ├── c │ └── foo.c ├── d ├── ...
- 225
2 votes
1 answer
389 views
How to get multiple pattern rule %/$* variables in a Makefile?
All we get in Makefiles is just one %/$* pattern rule pair. $ cat Makefile %.bla:; echo $* $ make -s m.bla m How shortsighted of our Unix™ fathers. How can I achieve something like %{0}.%{1}.bla that ...
- 667
5 votes
2 answers
466 views
How to do indirect variable substitution in a GNU Makefile?
In the shell I can do $ a=b b=c; eval echo \$$a c How do I do the same with GNU Make's $(eval) function? $ cat Makefile a=b b=c x:; echo {What goes here in order to get:} $ make c
- 667
0 votes
0 answers
43 views
Dependency files track based compile target starting via include $(DEPS) condition doesn‘t allow to use dependencies at the fisrt project Makefile?
From the GNU Make docs GNU Make Automatic prerequisites: The practice we recommend for automatic prerequisite generation is to have one makefile corresponding to each source file. For each source ...
- 61
1 vote
2 answers
82 views
Can I use a flexible (either or) prerequisite in GNU make?
Is it possible to have a flexible extension for a prerequisite? For example, let's say I want to apply a rule to a list of targets that all have the same prerequisite pattern, except that some of them ...
- 111
0 votes
0 answers
33 views
Why doesn't `rm -f *.{log,pdf,bbl,blg,aux}` work in a Makefile? How to repair? [duplicate]
In someone's Makefile, I saw clean: rm -f *.{log,pdf,bbl,blg,aux} Upon running make clean, all the files were still there as before; nothing was removed. So what's the analogon of a shell's rm -...
- 1
0 votes
2 answers
441 views
How to write a function that returns parent path in makefile
I am creating a new makefile and I would like to create a set of utility functions which may be repetitively called. One of the functions is about how to return the parent path from any given path, e....
- 247
1 vote
1 answer
966 views
How to make all targets in the Makefile depend on a specific file?
Here in make I want to make all targets in the whole Makefile depend on a specific file. (That specific file is Makefile in fact, because that's where I have all my formulas. But that's beside the ...
- 667
0 votes
1 answer
107 views
String replace in wildcard using find command
I want to exclude all C files that have a matching asm file. The assembly files all have _x86_64.S at the end. The C files have identical names, but with .c instead of _x86_64.S at the end. How would ...
5 votes
1 answer
382 views
How to make MAKEFLAGS=--warn-undefined-variables apply to current Makefile?
Yes I read Communicating Options to a Sub-'make' but I want to set an option for this make, not a sub-make, and set it within the Makefile, not via the command line. $ cat Makefile MAKEFLAGS = --warn-...
- 667
0 votes
1 answer
172 views
What wildcards will work with Make's .INTERMEDIATE target?
Isn't there some wildcard I can use for Make's .INTERMEDIATE target? $ cat Makefile .INTERMEDIATE: *.csv %.csv #failed .INTERMEDIATE: north.csv g.csv #worked Or must I list each and every file each ...
- 667
1 vote
1 answer
323 views
Why touching just one source, make recompiles again the other untouched source file?
Just touching file mod1.c, make should just recompile that source file, produce its correspondent object file, mod1.o, and should not recompile mod2.c, because the object file mod2.o will be still ...
- 113
1 vote
1 answer
609 views
How to join strings without implicit space?
I'm trying to organize a Makefile with complex commands into something more readable. I'm trying to break down a long list of parameters, but even single parameters are too bad, hence I wanted to ...
- 953
1 vote
1 answer
377 views
what is the difference between 'Recursively Expanded Variable Assignment' and 'Simply Expanded Variable Assignment' in Makefile?
I am confused about the difference between them. I have read the GNU documentation, but I am still confused. The value you specify is installed verbatim; if it contains references to other variables, ...
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