I've studied and worked with STM32F407 during the spring, and I was wondering about the rationale behind how it organizes external interrupts. To understand this, it would be beneficial if I could understand how it works at the hardware level, how signals from pins are wired to EXTI interrupt lines. I assume multiplexers are used, and that is what I want to ask about.
I assume there are general trends across how microcontrollers or computers solve external interrupts, so answers do not have to specifically be about STM32F407 (if schematics for it happen to be hard to find), but I'll use it as a reference in my question.
The EXTI system has 16 interrupt lines, EXTI0 to EXTI 15, and each can interface the corresponding pin in any of the GPIO ports, of which there are roughly 10 (9 or 11 depending on exact version of STM32F4**), I will use 10 here. So each EXTI line has to be able to select one of 10 signals. I would assume it uses a multiplexer with 10 inputs and one output for that.
The configuration for what GPIO port an EXTI line should use, is done in SYSCFG in 4 bit registers, I assume these registers are used as selection input to the multiplexers.
What I want to ask is, is 16 multiplexers likely used for the 10 GPIO ports to route the pin from the desired port to the EXTI line?
Follow-up question if anyone is interested
If yes, is the reason they only allow the corresponding pin for an EXTI line, instead of any pin to any EXTI line, that the latter would require multiplexers with 160 inputs instead of 10, and 8 bit selection inputs, and that this is a lot of added parts?
Or is there some other rationale for why they use the pin_x to line_x mapping?
