Questions tagged [timing]
This tag is relevant to issues with timing of a protocol or a standard. This could contain UART/ IIC etc. timing as well as timing for driving a motor.
379 questions
0 votes
3 answers
148 views
RC Circuit for Timing Module
I am building a timing circuit designed to detect pulse signals and shut off a load (e.g. an LED) if the pulses are sustained, but allow the load to remain ON if the input is a steady DC 12V. Project ...
- 11
0 votes
2 answers
91 views
Understanding Tready Timing with EEPROM Connected to PHY (Max Tready 120ms)
I’m working with a PHY device as described in the datasheet (p. 158) of this PHY, and I’m trying to understand the Tready timing with an EEPROM connected to the device. According to the datasheet, the ...
- 1,947
2 votes
1 answer
84 views
Sample and hold (S&H) lower sample timing problem
I want to build a 1-octave keyboard and want to hold last note pressed. I hardly found some circuits online and they are working properly(ish) but when I press higher notes first and lower notes after,...
1 vote
2 answers
140 views
Why does the 2‑wire asynchronous handshake use this exact edge sequence?
1. Control Models Master / Slave The master controls the communication line (decides when to transmit or receive). The slave transmits or receives under the master’s command. Peer‑to‑Peer (symmetric) ...
- 193
2 votes
1 answer
186 views
Car central lock control pulse circuit
I had a central lock control circuit malfunctioning in my car. I tried to reverse engineer it and here is the schematic I came up with: Figure 1. Schematic. The driver's door lock has some kind of ...
- 75
2 votes
0 answers
45 views
How are the PSTransitionTimer/tPSTransition for USB PD interpreted?
The USB Power Delivery specification has the following to say about the timer in question: 6.6.5.1 PSTransitionTimer The PSTransitionTimer is used by the Policy Engine to timeout on a PS_RDY Message. ...
- 24k
2 votes
1 answer
149 views
Power Supply timing specification
Using this E51 microcontroller in a project. On page 1853 of the datasheet, the rise rate specifications for the microcontroller's power domain are provided. I am supplying the device with a fixed 3....
- 1,947
4 votes
1 answer
527 views
How to generate 640x600 resolution on a VGA monitor?
If a monitor can display 640x480 and 800x600 resolutions, then is it possible to display 640x600? I am generating my own video signals with an FPGA and an LCD monitor (1680x1050 max resolution, but ...
- 247
-3 votes
2 answers
174 views
How can I design a circuit using only discrete components (no ICs and no logic gates) to control four bulbs in this sequence? [closed]
Bulb 1: ON for 16s, then OFF → Bulb 2 turns ON. Bulb 2: ON for 8s, then OFF → Bulb 3 turns ON. Bulb 3: ON for 12s, then OFF. Bulb 4: Turns ON 12s after Bulb 1 and stays ON for 12s. The cycle repeats ...
0 votes
0 answers
104 views
Mistake in Proper Timing Constraining QSPI Flash
I have a Zynq-7020-based FPGA board and a QSPI Flash IC (Micron Serial NOR Flash Memory, part number: MT25QL128ABA). I want to interface with this flash in quad mode (i.e., using all four lanes for ...
0 votes
1 answer
99 views
How to specify clock period in Synopsys Design Constraints file (SDC)?
The SDC file: create_clock –period 37 –waveform {0 18.519} {clk} While reading SDC file in the Quartus, I get following error: ...
- 363
1 vote
1 answer
83 views
SSD1306 I2C `ack` bits on Open Drain Implementation
I am trying to get an ack message response on my SSD1306. To send the signal, I am using a 27MHz FPGA clock, divided so that the clock cycle is around ...
- 643
1 vote
1 answer
68 views
SSD1306 OLED IIC timings ACK
I am looking to make sure my understanding of the ack signal is correct for the SSD1306 Based on some previous questions, I have changed the signal I am sending out ...
- 643
1 vote
1 answer
119 views
SSD1306 initialisation timings I2C
I am trying to make sure I have understood the I2C timings correctly for the SSD1306. As an example, I have shared below the ...
- 643
6 votes
6 answers
514 views
Capacitor delay circuit specific component selection
I’m looking for advice on how to design a time-delay relay circuit using discrete components (rather than, say, a CMOS or 555 chip). The goal is to have delay between the switch being closed and the ...
