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Questions tagged [die]

A die is a small block of semiconducting material on which a given functional integrated circuit is fabricated. Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon (EGS) or other semiconductor (such as GaAs) through processes such as photolithography. The wafer is cut (“diced”) into many pieces, each containing one copy of the circuit. Each of these pieces is called a die.

2 votes
2 answers
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I would like to gain a better understanding of IC package lead inductance and on-die capacitance. For a physically larger IC chip, would the on-die capacitance generally be higher due to the reduced ...
Potionless's user avatar
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0 votes
1 answer
165 views

I am looking at old ISA graphic adapters that would provide a simple black and white text mode. I am trying to make the design as simple as possible and I would like to make the PCB as small as ...
tpimh's user avatar
  • 633
27 votes
4 answers
5k views

Around the edge of a wafer (see image below) you will observe that there are many partial dies. It seems wasteful to use the lithography machine to print these partial dies because they will be ...
phil1008's user avatar
  • 472
1 vote
2 answers
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In Weste and Harris's CMOS VLSI Design, they describe MOSIS as follows: The MOSIS service [Piña02] is a low-cost prototyping service that collects designs from academic, commercial, and government ...
EE18's user avatar
  • 1,259
9 votes
3 answers
2k views

I know an IC die can be cut into a rectangular shape. Apparently triangles and rhombuses are also possible, but not used. What other tesselations can they be cut into?
Jacob Krall's user avatar
5 votes
2 answers
1k views

I cracked open this 2N3904 transistor. I lack the means to test its function until tomorrow. The die doesn't look like anything I've ever seen before. I'm not quite sure where the silicon is. In your ...
Aaron Butkovich's user avatar
5 votes
2 answers
1k views

I'm making my project and I managed to kill 2 ESP32 boards. First time I thought it was just accident (me shorting 2 wires) because my cables were messy, but it happened again and the circumstances ...
krystof18's user avatar
  • 167
0 votes
2 answers
160 views

When comparing the electrical parameters of the MOSFET/Transistors, do they change when the package type changes? Are the parasitic parameters of the packaged MOSFET and bare die MOSFET change. It is ...
Ishani Engineeŕ's user avatar
10 votes
5 answers
2k views

EDIT: VERY INTERESTING TEST RESULTS I just tried inducing the thermal failure using an inverted "can of air" (likely difluoroethane). It even when its super cold, (might even be below -40C), ...
Tim Vrakas's user avatar
0 votes
1 answer
330 views

Internet search finds single vs double sided memory, here discussions are about Printed Circuit Boards (PCBs) for singe vs double sided. I'm interested to know if e.g. Intel processors, as they are ...
Martian2020's user avatar
3 votes
1 answer
249 views

I have a camera sensor (bare die) that must go on a very tiny PCB that also contains electronics for data serialization that dissipate enough power to make the PCB pretty hot (40-60 deg. C). I want to ...
jonnew's user avatar
  • 91
0 votes
1 answer
222 views

I am trying to model a parallel plate capacitor (on die capacitor generated using metal plates.) I know the capacitance per unit area, and metal sheet resistance. No knowledge of the dielectric. I ...
Manoranjan Roshan's user avatar
0 votes
0 answers
176 views

Not a very technical question but I'm interested in finding out the average size of a 3-axis accelerometer die. I’m finding that the smaller package sizes are around 2x2x1mm, is there a way of ...
Sneaky Puffin's user avatar
0 votes
2 answers
226 views

I have a 24 pin IC chip that was soldered onto a tiny PCB. I was able to decap the chip and read the label, but I am not finding any information through Google. Does anyone recognize this label that ...
user avatar
2 votes
1 answer
2k views

I have no experience with bare die as a package, and I have been recently tasked with deciding between bare die, BGA, or QFN package for a SoC. Searching the internet, I have not really found much ...
KirchoffFanBoy's user avatar

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